CXMT’s RMB 29.5B IPO Sparks 5x Surge, But Memory Cycle Risks Loom
China's sole scaled DRAM producer hits the STAR Market at a RMB 579 billion (US$80.4 billion) valuation, even as crypto derivatives on Hyperliquid briefly priced the company above Industrial and Commercial Bank of China—a disconnect that lays bare both the geopolitical premium attached to domestic memory chips and the unresolved technology gap that caps long-term upside.
On July 16, 2026, ChangXin Memory Technologies, known internationally as CXMT, opened its Shanghai STAR Market subscription window, setting an issue price of RMB 8.66 per share and targeting gross proceeds of up to RMB 29.5 billion (US$4.1 billion)—the largest A-share IPO of 2026 and the second-largest in STAR Market history. The listing arrives one week after SK Hynix's record-breaking US$24.5 billion Nasdaq debut, which itself was followed within 24 hours by one of the memory sector's sharpest single-day selloffs in nearly two decades—a sequence that functions less as coincidence than as a stress test for the industry's "post-cyclical" narrative.
Market reaction outside mainland China has been anything but measured. On decentralized derivatives platform Hyperliquid, a pre-IPO perpetual contract for CXMT—ticker symbol "CXMT"—opened at US$5 and surged to US$7.48 within hours of the A-share subscription launch, implying a total market capitalization of approximately RMB 3.4 trillion (US$472 billion). That figure would place CXMT above Industrial and Commercial Bank of China, currently China's largest listed company by market cap at roughly RMB 2.66 trillion, and at roughly half the market value of SK Hynix—despite CXMT holding less than one-third of SK Hynix's global DRAM market share. The contract requires no regulatory approval, no physical share delivery, and no consent from CXMT itself; it simply tracks the renminbi share price and converts to U.S. dollars at spot rates, democratizing access for retail traders in Vietnam, South Korea, and the United States who are otherwise locked out of the RMB 500,000 (US$69,400) minimum required to participate in STAR Market subscriptions.
Structural Tailwinds Propel CXMT's Financials to Vertical Inflection
The fundamental case for CXMT is, by any conventional metric, difficult to argue with. In the first quarter of 2026, the company reported revenue of RMB 50.8 billion (US$7.1 billion), a 719% year-on-year increase, with net profit attributable to shareholders of RMB 24.76 billion (US$3.4 billion), up 1,688% over the same period. Management has guided for first-half 2026 revenue of RMB 110 billion to RMB 120 billion (US$15.3 billion–US$16.7 billion). According to Omdia data, CXMT's global DRAM market share reached 7.67% in the fourth quarter of 2025, ranking fourth globally and first in China—up from a negligible base just three years prior.
The revenue surge is not purely a function of volume. According to SemiAnalysis, overall DRAM supply fell approximately 7% short of demand in 2026, with the deficit driven by a structural capacity squeeze: producing an equivalent volume of High Bandwidth Memory (HBM) consumes roughly three times the wafer area of standard DDR5, effectively cannibalizing commodity DRAM supply. DDR5 16Gb contract prices have risen 307% since September 2025; DRAM spot prices broadly increased approximately 4.5-fold between the third quarter of 2025 and the second quarter of 2026. TrendForce's July 2026 report confirms that DRAM supply remains "extremely tight" through the third quarter of 2026, though it notes that contract price growth is decelerating—projected quarter-on-quarter gains of 13%–18% versus the near-vertical trajectory of the preceding four quarters.
CXMT is a direct beneficiary of this structural squeeze precisely because it does not produce HBM. The three incumbent leaders—Samsung Electronics, SK Hynix, and Micron Technology — have redirected the majority of their advanced-node capacity toward HBM and enterprise DDR5, creating what analysts describe as a "capacity vacuum" in commodity DRAM that CXMT has moved quickly to fill. By Citrini Research estimates, CXMT's monthly wafer output will approach 350,000 wafers by end-2026, closing in on Micron's approximately 375,000 wafers.
HBM Absence Compresses the Ceiling on Valuation Multiples
The same dynamic that generates CXMT's near-term windfall also defines its structural constraint. SemiAnalysis analyst Ray Wang stated on CNBC that CXMT lags Samsung and SK Hynix in HBM technology by three to four years—equivalent to 1.5 to two product generations. CXMT's HBM3 products remain in sample validation and limited pilot production; Samsung and SK Hynix have already entered commercial HBM4 shipments.
The gap is not merely a matter of time; it is a matter of process architecture. HBM4 requires the base die to be manufactured on a logic process—FinFET or Gate-All-Around transistor architectures—rather than the buried-wordline, stacked-capacitor process that defines DRAM fabrication. As a pure DRAM IDM (Integrated Device Manufacturer), CXMT's entire process platform is optimized for memory, not logic. Bridging that divide requires either in-house logic process development—a multi-year, capital-intensive undertaking—or dependence on TSMC's CoWoS advanced packaging, which introduces both supply chain vulnerability and geopolitical risk given current technology export controls.
The IPO prospectus allocates RMB 29.5 billion across three use-of-proceeds categories: RMB 7.5 billion (US$1.04 billion) for existing production line upgrades; RMB 18 billion (US$2.5 billion) for DDR5/LPDDR5X scale-up; and RMB 9 billion (US$1.25 billion) for "forward-looking memory R&D"—the category analysts interpret as encompassing HBM development. After accounting for other R&D priorities such as compute-in-memory, the actual capital directed at HBM is likely materially below RMB 9 billion. By contrast, SK Hynix's management reaffirmed at its 2026 annual general meeting a commitment to accumulating net cash reserves exceeding KRW 1 trillion to fund HBM, DRAM, and NAND Flash capacity expansion. The arithmetic gap between CXMT's HBM R&D budget and the capital being deployed by incumbents is not bridgeable in a single capital raise.
This bifurcation creates a valuation framework problem. Pricing CXMT as a cyclical DRAM manufacturer—on price-to-book or earnings-cycle multiples—the RMB 579 billion listing valuation at 5.06x book is defensible given the current supply-demand configuration. Pricing it as a technology platform company capable of competing in the HBM market that now anchors the long-term earnings narratives of Samsung and SK Hynix requires a substantially different set of assumptions that the current prospectus does not yet support.
Cycle Peak Timing Becomes the Critical Variable for Investors
The memory cycle has not been abolished—it has been elongated and partially smoothed by Long-Term Agreements (LTAs). SK Hynix has locked HBM supply contracts through 2028; Samsung has mandated minimum three-year supply frameworks for major customers from 2026; and SK Hynix is reportedly negotiating five-year general DRAM agreements with Google, using HBM3E supply rights as leverage. By locking in floor prices, LTAs reduce demand-side volatility. They also cap margin upside in a supply-constrained environment—a dynamic that Korea Investment Securities (KIS) cited as a primary rationale for downgrading SK Hynix in the week of CXMT's listing.
The analytical framework that emerges from a close reading of CXMT's prospectus alongside SemiAnalysis supply-demand models points to a two-speed cycle. For DRAM, Bloomberg's own supply-demand models previously placed the equilibrium crossover point at the fourth quarter of 2027. Consumer electronics demand is already softening: IDC projects global PC revenue growth of just 1.6% in 2026, with unit shipments declining 11.3%; global smartphone shipments are forecast to fall 12.9% in 2026, with China's first-quarter 2026 domestic handset shipments down 3.3% year-on-year to 69.8 million units. Downstream consumer electronics manufacturers have been building inventory since 2024; current stock levels have nearly doubled. CXMT's own LPDDR (mobile DRAM) unit revenue growth has already shown sequential deceleration relative to 2024 levels—a leading indicator that the mobile DRAM price cycle may be closer to its peak than consensus assumes.
For HBM, the inflection arrives later. The supply expansion timeline is relatively synchronized across the industry: SK Hynix's Yongin facility is scheduled for completion in 2027; Micron's Idaho and Singapore HBM lines are targeted for 2027; Samsung's fifth Pyeongtaek plant focused on HBM is not expected to contribute meaningful capacity until after 2028. SemiAnalysis projects the HBM supply gap at 6% in 2026, widening to 9% in 2027—meaning no demand-side disruption to the HBM cycle is probable within a three-year horizon. The synthesis: DRAM's cycle peak likely arrives in late 2027, while HBM's critical test—whether LTA renewals and post-2028 capacity expansion can sustain pricing discipline—comes in 2028 to early 2029. The window between those two inflection points is precisely the period during which CXMT will need to demonstrate credible HBM progress to defend a technology-stock valuation premium.
Strategic Investors Signal Confidence in the Domestic Supply Chain Thesis
The institutional architecture around the IPO reflects a deliberate effort to anchor the listing within China's broader technology self-sufficiency narrative. Fantasia Quantitative, the quantitative fund affiliated with DeepSeek founder Liang Wenfeng, deployed 153 private fund vehicles in the offline subscription process at RMB 8.78 per share. NIO committed RMB 158 million (US$21.9 million) as a cornerstone investor with an 18-month lock-up, designating itself a "strategic cornerstone partner" and citing planned collaboration on automotive-grade LPDDR4X and LPDDR5X products. MSI has become among the first motherboard manufacturers to officially validate CXMT DDR5 modules on both Intel LGA 1851 and AMD AM5 platforms, achieving DDR5-8000+ on Intel and DDR5-8200 on AMD dual-channel configurations—a commercial milestone that distinguishes CXMT's output from laboratory samples, even if Tom's Hardware benchmark testing indicates stability at extreme overclocking still trails SK Hynix.
CXMT chairman Zhu Yiming framed the listing on July 15 as both a milestone and a mandate: "We will continue to maintain reverence for technology, commitment to innovation, and passion for the industry, continuously enhancing our core competitiveness and striving to build a globally influential semiconductor memory enterprise." The company's trajectory—from its first self-designed 8Gb DDR4 chip in 2019 to fourth-generation process platform commercialization in 2026—represents the most tangible evidence to date that China's DRAM industry has moved from aspiration to operational scale.
The question that neither the prospectus nor the Hyperliquid perpetual contract can definitively answer is whether that trajectory can be extended into the HBM tier before the commodity DRAM cycle that currently funds the effort begins to turn.
Related Coverage:
CXMT’s RMB 29.5B STAR IPO Leaves Retail Investors With a Sliver