Huawei's New AI Chip Launch Highlights Three Critical Challenges for China's Domestic Semiconductor Industry
China's AI chip sector is undergoing a strategic transformation as Huawei Technologies Co. unveiled its latest processor lineup at the 2025 Huawei Connect conference, introducing the Ascend 950, 960, and 970 series AI chips alongside a three-year product roadmap that signals the industry's shift toward application-driven innovation.
The flagship 950 series features two variants with distinct suffixes—PR (Prefill & Recommendation) and DT (Decoder & Training)—representing Huawei's "P/D separation" design philosophy that addresses resource allocation conflicts in large language model inference. This architecture aims to optimize the balance between computing power, memory capacity, and memory bandwidth to improve return on investment.
The product launch underscores how China's AI application demands, particularly the ability to run DeepSeek's full-parameter model, have become the benchmark for domestic AI computing systems. Supporting 671 billion parameters requires memory configurations that can differ by tens of thousands of dollars, highlighting the cost pressures driving innovation in China's semiconductor ecosystem.
Industry observers note that application providers like DeepSeek are increasingly driving AI chip development in China, while the "Huawei-Hygon-Others" ecosystem structure is solidifying to meet growing data center infrastructure demands.
Production Capacity Constraints Ease as Ecosystem Building Takes Priority
Recent industry signals and supply chain developments indicate Huawei's production capacity constraints have largely been resolved. Companies providing CoWoS-like packaging services for Huawei have reported capacity surplus this year around the 7-nanometer node, suggesting demand has been adequately met.
Huawei showcased its CloudMatrix384 super node during the World Artificial Intelligence Conference, featuring point-to-point, fully-interconnected, ultra-high bandwidth networking through UB protocol connections across all NPUs and CPUs. The architecture demonstrates complete point-to-point decoupling and pooling of CPU, NPU, memory, network interface cards, and other resources.
The system incorporates ultra-high bandwidth unified bus (UB) for intra-super node scaling, RDMA for inter-super node communication, and virtual private cloud (VPC) for data center network integration, leveraging Huawei's core communications technology expertise.
With hardware breakthroughs achieved across computing, high-speed interconnection, and storage bandwidth, Huawei's next challenge involves ecosystem development. The company faces a transition from closed to open models, requiring benefit-sharing mechanisms similar to Intel's x86 and NVIDIA's CUDA ecosystems.
Rise of Product Management Era in China's Chip Industry
The 950 series' PR and DT variants represent the industry's exploration of "P/D separation," addressing practical challenges in China's AI computing landscape. Large language models require massive parameter storage with high-speed access capabilities, driving demand for high-bandwidth memory (HBM) solutions that cost nearly 10 times more per gigabyte than DDR memory.
AI inference performance is typically measured by Time-To-First-Token (TTFT) and Time-Per-Output-Token (TPOT) metrics. TTFT measures prefill stage performance requiring high parallel computing capabilities, while TPOT evaluates decode stage performance demanding higher memory capacity and bandwidth.
When prefill and decode operations run on the same AI chip, resource competition occurs due to different computational characteristics. Prioritizing prefill to reduce TTFT may degrade decode performance (TPOT), while optimizing TPOT increases prefill waiting time and raises TTFT.
Running DeepSeek's full-parameter version has become the litmus test for domestic AI computing systems. The ability to balance computing power, memory capacity, and memory bandwidth through trade-offs represents a critical optimization challenge requiring specialized product management expertise.
China's chip companies currently lack qualified product managers with the technical background, market application knowledge, and optimization capabilities needed to drive next-generation AI chip development. This shortage represents a bottleneck as demand-driven product definition becomes increasingly important.
AI Industry Leadership Drives Chip Innovation
The development trajectory demonstrates that AI industry prosperity and leadership serve as prerequisites for AI chip breakthroughs and innovation. Application providers' requirements, from DeepSeek's full-parameter demands to FP8 data precision needs and P/D separation implementation, are driving product definition trends in China's market.
This represents the economic principle of "demand determines supply" manifesting in China's AI sector. Historical precedents in telecommunications, power, and infrastructure industries show how large market scale and thriving downstream sectors drive upstream technical breakthroughs and product innovation.
As a large-scale economy, China possesses the industry diversity, industrial coordination, and capital accumulation necessary to pursue both world-class computing facilities for cutting-edge development and support for domestic AI computing infrastructure. The strategic approach involves leveraging all available resources to maintain competitive positioning in the global AI race.
The transformation reflects China's broader industrial upgrading pattern, where market-driven demand creates innovation pressures that ultimately drive technological breakthroughs across the entire supply chain ecosystem.