China's Domestic Computing Power Push: Chips, Fabs, and Supernodes Explained
China’s AI compute race is moving from models to infrastructure — and the next battle is silicon
This article is based on Guolian Minsheng Securities’ July 2026 report, “Three Arrows of Domestic Computing Power: Chips, FABs, and Supernodes,” which examines the structural shift reshaping China’s AI infrastructure stack.
What Is "Domestic Computing Power," and Why Does It Matter Now?
"Domestic computing power" refers to China's broader push to build a self-sufficient AI hardware stack — covering AI accelerator chips, the foundries that manufacture them, and the system-level infrastructure that ties them together.
For most of the past decade, China's AI infrastructure relied heavily on imported components, particularly NVIDIA GPUs. That dependency is becoming increasingly untenable. A sustained series of U.S. export controls — from October 2022 through mid-2026 — has progressively restricted China's access to advanced AI chips and the manufacturing equipment needed to produce them domestically. The policy trajectory is clear: the restrictions are not static, and they are not reversing.
At the same time, demand is surging. Chinese large language models (LLMs) — including DeepSeek, Kimi, Qwen, and others — have moved from technical curiosity to production-scale deployment. Token call volumes from Chinese models surpassed those of U.S. models for the first time in February 2026, with Chinese platforms accounting for 4.12 trillion tokens in a single week. AI agent frameworks, which consume four to fifteen times more tokens per task than standard chat interactions, are amplifying this demand further.
The combination of constrained supply from abroad and exploding demand at home has created the conditions for a structural reorientation of China's AI hardware ecosystem.
Arrow One: AI Chips — From Validation to Volume Shipment
What is the current state of domestic AI chips?
In 2025, approximately four million AI accelerator cards shipped into the Chinese market. Of those, roughly 1.65 million — about 40% — came from domestic manufacturers, the first time domestic chips crossed that threshold. The market is shifting from "NVIDIA dominant" to a more fragmented structure with multiple domestic contenders.
Huawei's Ascend line leads the domestic field, accounting for roughly half of all domestic AI chip shipments in 2025 (approximately 812,000 units). Its roadmap extends through the Ascend 950PR (Q1 2026), 950DT (Q4 2026), 960 (2027), and 970 (2028), with each generation targeting significant improvements in interconnect bandwidth and compute density.
Other notable players include:
- Cambricon: Full-spectrum coverage across cloud training, cloud inference, and edge deployments. Its Siyuan 590 delivers roughly 70–80% of NVIDIA A100-equivalent performance.
- Hygon: Targets customers needing x86 compatibility and a CUDA-like software environment, with a primary customer base in state-owned banks and supercomputing centers.
- MetaX: Its MXC600 passed China's national security certification in May 2026, opening access to regulated sectors including finance, government, and telecoms.
- Iluvatar CoreX: Claims throughput and latency performance exceeding NVIDIA A800 in DeepSeek R1 inference scenarios.
Why are cloud vendors' capital expenditures a key demand driver?
China's three largest internet companies — Baidu, Alibaba, and Tencent (collectively "BAT") — spent a combined 647.46 billion yuan on capital expenditures in Q1 2026, up 17.7% year-over-year. ByteDance raised its 2026 capital expenditure plan to 160 billion yuan, with approximately 85 billion yuan earmarked directly for AI chip procurement. Alibaba has committed 380 billion yuan over three years to cloud and AI infrastructure.
As domestic chip supply improves, these budgets increasingly flow to domestic suppliers rather than waiting for constrained foreign allocations.
What role do custom ASICs play?
Beyond general-purpose GPUs, Chinese cloud companies are accelerating the development of custom application-specific integrated circuits (ASICs). ByteDance is building custom inference chips to reduce per-token costs; Alibaba is developing both NPUs and server CPUs to create a vertically integrated AI stack.
VeriSilicon has emerged as the key enabler of this trend. The company provides a one-stop ASIC design and production service — covering chip definition, design, tape-out management, and volume delivery — built on a library of proprietary processor IP (GPU, NPU, VPU, DSP, ISP). Its backlog reached 5.133 billion yuan in the first four months of 2026, following three consecutive quarterly records in 2025. The majority of orders are now concentrated in cloud-side AI ASIC projects.
Arrow Two: Foundries — The Manufacturing Substrate That Everything Else Depends On
Why is domestic wafer fabrication strategically critical?
Advanced chip design is only half the equation. Chips must be manufactured, and for years, Chinese AI chip designers relied on overseas foundries — primarily TSMC — for their most advanced nodes.
That path is narrowing. The U.S. Commerce Department's Bureau of Industry and Security (BIS) has progressively tightened controls on: - Advanced logic chips (16nm and below) - Semiconductor manufacturing equipment exports - Foundry due-diligence requirements for AI chip customers - The ability of foreign-invested fabs in China to expand capacity or upgrade processes
In August 2025, the U.S. revoked Validated End User (VEU) exemptions for certain foreign-invested fabs in China, effectively limiting their ability to expand. In February 2026, Applied Materials was fined $252 million for routing equipment shipments to China via South Korea. The message to the industry is unambiguous: third-country workarounds are under scrutiny.
Who are the key domestic foundries, and what are they doing?
SMIC is the largest domestic foundry. In Q1 2026, it reported revenue of 17.62 billion yuan (up 8.1% year-over-year) with monthly capacity of 1.078 million 8-inch equivalent wafers and a utilization rate of 93.1%. Revenue from 12-inch wafers now accounts for 76.4% of total revenue, and 88.9% of revenue comes from Chinese customers. Management guided for Q2 2026 revenue growth of 14–16% sequentially.
Hua Hong Semiconductor reported Q1 2026 revenue of $660 million, up 22.2% year-over-year, with a utilization rate of 99.7% — essentially at full capacity. Its 12-inch revenue share has risen to 62.7%, with strong growth in MCU, flash memory, and BCD platform products.
NEXCHIP focuses on 12-inch specialty process platforms including display driver ICs (DDIC), CIS, and PMIC. It is currently validating 28nm OLED processes and has begun construction of new capacity targeting 40nm and 28nm nodes.
What is the demand trajectory for domestic advanced fabrication?
China's intelligent computing chip market is projected to grow from $30.1 billion in 2024 to $201.2 billion by 2029 (CAGR: 46.3%), with GPGPU specifically growing at 49.0% CAGR. Beyond AI chips, Huawei's announcement of its "Tao (τ) Law" — a roadmap for achieving 1.4nm-equivalent transistor density by 2031 through architectural innovation rather than lithography alone — signals sustained demand for advanced domestic fabrication.
Arrow Three: Supernodes — The Architecture Shift That Redefines the Playing Field
What is a supernode, and why does it matter?
A supernode is a computing architecture in which multiple server nodes are interconnected via ultra-high-speed links to form a unified compute domain. Rather than treating each server as an independent resource unit, a supernode allows AI accelerators distributed across multiple physical servers to operate as a single, coherent pool.
This matters because single-card performance has become a bottleneck. As LLM parameter counts grow — and architectures like Mixture-of-Experts (MoE) and long-context models become standard — the performance of an AI cluster is increasingly determined not by the peak specs of any individual chip, but by how efficiently those chips communicate with each other.
Two complementary scaling approaches define modern AI infrastructure:
- Scale-up: Expanding the resources within a single node or supernode through high-speed chip-to-chip interconnects. Optimizes for low-latency, high-bandwidth communication between accelerators.
- Scale-out: Adding more nodes to a cluster. Optimizes for total compute at the cost of higher inter-node communication overhead.
Modern AI data centers require both, but Scale-up has become the critical differentiator.
What does Huawei's CloudMatrix384 illustrate about this shift?
CloudMatrix384 integrates 384 Ascend NPUs and 192 Kunpeng CPUs into a single unified resource pool. Its design philosophy — "everything poolable, everything peer-to-peer, everything composable" — means compute, memory, and network resources can be dynamically allocated across the entire matrix rather than being locked to individual servers.
The system uses a proprietary Unified Bus with high bandwidth and low latency, enabling communication-intensive operations like Expert Parallelism and distributed KV Cache access. Meituan's LongCat-2.0, a 1.6 trillion-parameter model trained entirely on a 50,000-card domestic cluster using Ascend 910 chips, demonstrated sub-20ms token generation latency — a practical validation that domestic supernode infrastructure can support frontier-scale model training and inference.
What components benefit from the supernode buildout?
The supernode architecture creates demand cascades across multiple hardware categories:
PCIe Switch chips handle high-bandwidth, low-latency data exchange between CPUs, GPUs, and storage within a server or supernode. The domestic PCIe switch market in AI servers was approximately 3.8 billion yuan in 2024 and is projected to reach 17 billion yuan by 2029. Domestic players include Montage Technology, which has developed PCIe 6.x/CXL 3.x solutions using proprietary SerDes technology, and Shudo Technology (acquired by Wantong Development), which has achieved volume production of a 104-lane PCIe 5.0 switch chip.
Ethernet switch chips handle inter-node and data-center-scale connectivity. Centec Networks has flagship chips at 12.8Tbps and 25.6Tbps supporting up to 800G port speeds. ZTE Microelectronics launched its "Lingyun" AI switch chip in 2025, designed to support clusters of up to 100,000 cards.
High-speed SerDes and optical interconnects form the physical layer of all these connections. LightCounting projects the Scale-up switch chip market alone will approach $18 billion globally by 2030, growing at 28% CAGR from 2022.
Server OEMs that can integrate these systems — including Lenovo, Inspur, Huaqin Technology, Unisplendour, and Ruijie Networks — benefit from rising system complexity, which increases both their technical barriers to entry and their value-add in the supply chain. Lenovo's Infrastructure Solutions Group (ISG) reported full-year revenue of $19.2 billion in fiscal year 2025/26 (ending March 2026), up 32% year-over-year, with AI server revenue growing 50% and an order backlog exceeding 140 billion yuan.
What Are the Key Constraints and Risk Factors?
Several variables could slow this structural shift:
- AI demand deceleration. If LLM adoption plateaus or cloud capex growth slows, the entire demand thesis weakens. Token growth and capex commitments are the leading indicators to watch.
- Chip performance gaps. Domestic chips still trail NVIDIA's best offerings in raw performance, software ecosystem maturity, and ease of migration. The gap is narrowing but not closed.
- Manufacturing bottlenecks. Domestic foundries are operating near full capacity. Expanding advanced process capacity requires equipment that is itself subject to export controls — a circular constraint that takes years to resolve.
- Export control escalation. The U.S. regulatory trajectory has been consistently toward tightening. Further restrictions — on equipment, software, or third-country routing — could disrupt supply chains in unpredictable ways.
- Supernode deployment pace. The architecture is proven at scale, but volume production ramp for next-generation supernodes (Ascend 950-based systems) is still in early stages.
What Comes Next?
The structural logic of this transition is durable. Export controls create a permanent incentive to build domestic alternatives. The scale of Chinese AI investment — measured in hundreds of billions of yuan annually — creates the economic foundation to fund that development. And the supernode shift means the competitive landscape is no longer just about which chip has the highest FLOPS rating; it is about which ecosystem can deliver the most efficient system-level compute.
The near-term indicators worth tracking:
- Domestic AI chip shipment share (currently ~40%; trajectory toward 50%+ is the key threshold)
- SMIC and Hua Hong capacity utilization and revenue growth (leading indicators of fab demand)
- Volume ramp of Ascend 950-based supernode systems
- Order backlog trends at VeriSilicon (a proxy for cloud ASIC demand)
- Capital expenditure guidance from ByteDance, Alibaba, Tencent, and Baidu in upcoming earnings
The broader picture is of an industry in the middle of a forced, accelerated transition — one that is uncomfortable in the short term but is building supply chain depth that will be difficult to reverse.
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