Huawei Unveils AI Chip Roadmap Through 2028, Plans Self-Developed HBM Memory
Huawei unveiled its artificial intelligence chip development roadmap extending through 2028, announcing plans to launch four new Ascend processors and integrate proprietary high-bandwidth memory technology starting next year.
Speaking at the Huawei Connect 2025 conference in Shanghai on September 18, Vice Chairman and Rotating Chairman Xu Zhijun outlined the company's three-year chip strategy. The roadmap includes the Ascend 950PR scheduled for Q1 2026, followed by the 950DT in Q4 2026, the Ascend 960 in Q4 2027, and the Ascend 970 in Q4 2028. The company had already released the Ascend 910C in Q1 2025.
The upcoming Ascend 950PR and 950DT chips will feature upgraded SIMD/SIMT microarchitecture with computing power reaching 1 petaFLOPS for FP8 operations and 2 petaFLOPS for FP4 operations. The processors will support multiple data formats including FP32, FP16, and various floating-point configurations, with interconnect bandwidth of 2TB/s. Performance will double with each subsequent generation, culminating in the Ascend 970's 4 petaFLOPS FP8 and 8 petaFLOPS FP4 capabilities.
A significant development involves Huawei's transition to self-developed HBM memory starting with the Ascend 950PR, which will incorporate the company's HiBL 1.0 technology. The 950DT will upgrade to HBM HiZQ 2.0, marking Huawei's move toward greater semiconductor independence amid ongoing international restrictions.
Xu also announced plans for enhanced AI infrastructure solutions, including the Atlas 950 SuperPoD featuring 8,192 cards set for Q4 2025 release, and the more powerful Atlas 960 SuperPoD with 15,488 cards planned for Q4 2027. The company reported over 300 deployments of its current CloudMatrix 384 super-node systems serving more than 20 clients.
The roadmap signals Huawei's sustained commitment to competing in the global AI semiconductor market despite geopolitical challenges, potentially positioning the company as a more self-reliant player in high-performance computing infrastructure.